Intel® ME Power GatingIntel® ME firmware enters power gated state (CM0-PG) when the firmware is idle and system state is either S0 or S0ix. Intel® ME firmware exits CM0-PG state to process power management events on the system and when host applications require Intel® ME firmware services. When the Intel® ME is in CM3 state, after Intel® AMT idle timeout, Intel® ME will enter CM3-PG state.Intel® ME Power Gating feature is available only, when the following conditions are satisfied:• Intel® ME Power Gating feature supported when Intel® AMT is un-configured and the platform is in S0 state. In this case Intel® ME may enter power gated state (CM0-PG) when the firmware reaches idle state.• Intel® ME Power Gating feature supported when Intel® AMT is configured and the platform is in Sx state. In this case Intel® ME is in CM3 state, after Intel® AMT idle timeout expiration, Intel® ME will enter CM3-PG state.Note: If the machine is configured to operate in Modern Standby or Microsoft* Windows* InstantGo, all S3 tests are not relevant, and should be replaced with the CM0-PG tests.