The MP3215 uses a constant frequency, peak
current mode boost regulator architecture to
regulate the output voltage. The operation of
the MP3215 can be understood by referring to
the block diagram of Figure 1.
At the start of each oscillator cycle the FET is
turned on through the control circuitry. To
prevent sub-harmonic oscillations at duty cycles
greater than 50 percent, a stabilizing ramp is
added to the output of the current sense
amplifier and the result is fed into the positive
input of the PWM comparator. When this
voltage equals the output voltage of the error
amplifier the power FET is turned off.
The voltage at the output of the error amplifier
is an amplified version of the difference
between the 1.25V reference voltage and the