A JL FET has advantages of smaller area by reducing thesource and drain (S/D) volume, lower cost by reducing theprocess steps for shallow and abrupt junction formation, lessdevice variability by eliminating random dopant fluctuationfrom ion-implant or the sensitive epitaxial growth of S/D,and better reliability from the bulk conduction mechanismcompared to a conventional MOSFET [13], [14]. Challengingissues in the JL FET, such as its relatively high off-stateleakage current, are not critical when they are employedin highly scaled synaptic device applications with a thinchannel [15].